DESIGN TECHNOLOGY

Brand Owner (click to sort) Address Description
BALANCING DESIGN AND TECHNOLOGY Automation Consultants, Inc. 1820 Lancaster Street Suite 200 Baltimore MD 21231 DESIGN AND TECHNOLOGY;Computer software design and implementation for others in the fields of on-line business applications and e-commerce solutions; website development for others;
ELECTRONICS ASSEMBLY EXPO Institute for Interconnecting and Packaging Electronic Circuits, The 2215 Sanders Road Northbrook IL 600626135 arranging and conducting trade shows in the field of electronics assembly and design technology;
HYPERCRITICAL FACILITIES Syska Hennessy Group, Inc. 11 West 42nd Street New York NY 100368098 Design of technology, namely, power systems, HVAC systems, security systems, fire and life safety systems and information technology infrastructure; technical consultation in the field of power supply technology and engineering services.;
IPC PRINTED CIRCUITS EXPO IPC INTERNATIONAL, INC. Suite 105N 3000 Lakeside Drive Bannockburn IL 60015 arranging and conducting trade shows in the field of electronics assembly and design technology;PRINTED CIRCUITS EXPO;
 

Where the owner name is not linked, that owner no longer owns the brand

   
Technical Examples
  1. Methods and apparatuses to automatically modify a circuit design (e.g., a synthesis solution) according to the sensitivity in design parameters with respect to the possible deviation in the subsequent implementation (e.g., placement and routing) of the circuit. In one aspect of the present invention, a method to design a circuit includes: determining likelihood of a design constraint being violated in an implementation of a first circuit design (e.g., a technology specific netlist with or without a placement solution); and, modifying the first circuit design to reduce the likelihood of the design constraint being violated. In one example, the implementation of the first circuit design includes a routing solution for implementing the first circuit design; and, the first circuit is modified through sizing an instance of a logic element, buffering a signal, load shielding for a signal, or other operations.