ADVERTISING PROMOTION REAL

Brand Owner (click to sort) Address Description
1 800 VACANCY Reynolds, Monica E. 3700 E. Seventh Street Long Beach CA 90804 advertising and promotion of real estate rentals and leasing;
1-888-HOME-2000 Sloan, Bruce D. 912 Baltimore Suite 120 Kansas City MO 64105 advertising and promotion of real estate brokerage services for others;
1-888-HOME-LINE Sloan, Bruce D. 912 Baltimore Suite 120 Kansas City MO 64105 advertising and promotion of real estate services for others;
1-888-HOME-PRO Sloan, Bruce D. 912 Baltimore Suite 120 Kansas City MO 64105 advertising and promotion of real estate services for others;
1-888-HOUSE-PRO Sloan, Bruce D. 912 Baltimore Suite 120 Kansas City MO 64105 advertising and promotion of real estate brokerage services for others;
1-888-HOUSES-1 Sloan, Bruce D. 912 Baltimore Suite 120 Kansas City MO 64105 advertising and promotion of real estate brokerage services for others;
1-888-THE-HOUSE Sloan, Bruce D. 912 Baltimore Suite 120 Kansas City MO 64105 advertising and promotion of real estate brokerage services for others;
THE DIFFERENCE BETWEEN FOR SALE AND SOLD] Perry & Butler Realty, Inc. 8490 E. CRESCENT PARKWAY, SUITE 250 GREENWOOD VILLAGE CO 80111 ADVERTISING AND PROMOTION OF REAL ESTATE BUSINESS;
WE MAKE THE DIFFERENCE BETWEEN FOR SALE AND SOLD] Perry & Butler Realty, Inc. 8490 E. CRESCENT PARKWAY, SUITE 250 GREENWOOD VILLAGE CO 80111 ADVERTISING AND PROMOTION OF REAL ESTATE BUSINESS;
 

Where the owner name is not linked, that owner no longer owns the brand

    
Technical Examples
  1. A multiprocessor data processing system includes a plurality of processors coupled to an interconnect and to a global promotion facility containing at least one promotion bit field. A first processor executes a high speed instruction sequence including a load-type instruction to acquire a promotion bit field within the global promotion facility exclusive of at least a second processor. The request may be made visible to all processors coupled to the interconnect. In response to execution of the load-type instruction, a register of the first processor receives a register bit field indicating whether or not the promotion bit field was acquired by execution of the load-type instruction. While the first processor holds the promotion bit field exclusive of the second processor, the second processor is permitted to initiate a request on the interconnect. Advantageously, promotion bit fields are handled separately from data, and the communication of promotion bit fields does not entail the movement of data cache lines.