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REFORMAT SIGNALS FROM DATA TERMINALS
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| Brand | Owner (click to sort) |
|---|---|
| COMMSCOPE ENTERPRISE SOLUTIONS | CommScope Properties, LLC |
| COMMSCOPE SOLUTIONS | CommScope Properties, LLC |
| SYSTIMAX 360 | COMMSCOPE SOLUTIONS PROPERTIES, LLC |
Technical Examples
- A DRAM device includes a mode register that is programmed to select one of two modes for operating data bus terminals in the device. A timing circuit generates timing signals in synchronism with the clock signal that correspond to the selected mode. The timing signals are combined with read data signals to generate corresponding timed read data signals. These timed data signals and termination signals from the timing circuit are applied to pull-up and pull-down circuitry, which drive respective pull-up and pull-down transistors coupled to the data bus terminals. The transistors drive the data bus terminals to either a first or a second voltage if the first mode of operation is selected and to either a third or a fourth voltage if the second mode of operation is selected. Additionally, the pull-up and pull-down transistors bias the data bus terminals to respective voltages corresponding to the selected operating mode.
- A communications system and method performs centralized signal processing on received audio signals. A plurality of terminals are coupled to a processing switch via links. The terminals can be, for example, dedicated speakerphones, desktop handsets, or personal computers with audio capabilities. The links can be wired or wireless, can carry analog or digital signals, and can be shared with other users in a network. The switch receives the audio data from the terminals, processes the data according to desired acoustical procedures, creates one or more output mixes, and provides the output mixes to the appropriate terminals. The operation of the processing switch is controlled by a communications support module (CSM) which can receive, process, and send data to/from multiple terminals simultaneously. The CSM receives audio signals from the terminals. The CSM uses stored room models holding room model information including data and/or filters representing the acoustic properties of the terminal and/or the environment surrounding the terminal to produce the audio signals. Signal processing (SP) modules provide a pool of SP power from which the CSM can draw to process audio signals received from or being sent to the terminals. The CSM uses the SP modules to perform signal processing including acoustic echo cancellation, automatic gain control, noise reduction. The CSM also uses a mixing module to perform signal mixing.
- In a hybrid fiber coax (HFC) cable system, data is communicated upstream from user terminals to a headend of the system to realize various interactive services. The user terminals generate analog modulated signals representing the user data, which populate different channels in a reverse passband of the system. In accordance with the invention, the analog modulated signals are transformed to the corresponding digital baseband signals containing the data. The resulting digital baseband signals are optically transmitted to the headend, thereby efficiently utilizing the limited capacity of the fiber optical portion of the HFC cable system.
- A semiconductor memory device has common terminals shared between a part or all of address terminals for receiving n bits of an address signal and data terminals for outputting a data signal with its bit width of n bits or less and dedicated address terminals for receiving m bits of the address signal, wherein at the time of a read, after the n bits of the address signal have been input, a plurality of data signals within a selected page are consecutively read out through the common terminals using the m bits of the address signal input from the dedicated address terminals.
- A repeater having first and second communication terminals that receives signals at either of the terminals and transmits signals responsive to the received signals at the other of the terminals, comprising: a first signal processor that receives V.90 analogue data signals from the first terminal and generates bit streams responsive thereto that accurately reproduce the data in the analogue signals; a second signal processor; and a communication channel linking the first and second signal processors wherein the second signal processor receives the bit streams generated by the first signal processor via the communication channel and transmits V.90 PCM octets responsive thereto via the second terminal.
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