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CAPACITORS APPARATUS
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| Brand | Owner (click to sort) |
|---|---|
| 46 | Rossi, Valentino |
| THE DOCTOR | Rossi, Valentino |
| VALEROSSI | Rossi, Valentino |
| VALE|46 | Rossi, Valentino |
| VR | Rossi, Valentino |
| VR|46 | Rossi, Valentino |
Technical Examples
- A plurality of high capacitance capacitors are coupled to supply or accept large currents. Bus bars are welded to the capacitors to provide improved thermal performance as well as self-supporting rigidity to the geometrical structure formed by the capacitors and the bus bars.
- The present invention provides an output buffer providing multiple voltages including an arrangement of bootstrapping capacitors, and a charge replenishing mechanism which provides continuous pulses to the arrangement of bootstrapping capacitors, thereby, maintaining voltage on the bootstrapping capacitors.
- A capacitor charging semiconductor apparatus including a plurality of serially connected capacitors to be charged. A direct current source is applied to the plurality of capacitors. A plurality of bypass transistors is provided to bypass charge current supplied to the plurality of capacitors when a voltage of a capacitor exceeds a prescribed reference level. A plurality of parallel monitor circuits is provided to control the plurality of bypass transistors to equally charge the plurality of capacitors. A plurality of capacitor connection terminals is connected to both ends and intersections of the plurality of capacitors. A plurality of transistor connection terminals is connected to the plurality of control terminals of the bypass transistor. A prescribed number of capacitors is optionally charged by increasingly shorting a number of capacitor connection terminals from the highest and lower voltage side capacitor connection terminals.
- In a pipelined analog to digital converter with multiple stages of sub-converters, capacitor mismatch error can be reduced by splitting the capacitors into multiple numbers and randomly selecting part of the split capacitors as feedback capacitors. The selection of feedback capacitors can be made according to a digital output, clock phase, stage number of the sub-converter or the combination thereof. The approach of the present invention can be applied to the most significant bit (MSB) stage for a pipelined ADC. Moreover, a method for implementing the same is also proposed.
- A method and apparatus are for balancing capacitors in a capacitor bank. Three voltage levels are produced by a reference voltage source, to monitor the state of charge of the capacitors. The capacitor voltage on each capacitor is determined and is compared with the voltage levels. After the charging of the capacitors, normal operation starts when the capacitor voltage reaches the lowest voltage level and before it has reached the central voltage level. A balancing operation starts when the capacitor voltages of all the capacitors have reached the central voltage level, and ends when the capacitor voltage of all the capacitors has once again reached the lowest voltage level. When the lowest voltage level is reached once again, normal operation starts again. A fault is indicated upon reaching the highest voltage level.
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